EC8392 Digital Electronics Syllabus Notes Question paper Question banks PDF R17 - Anna University 3rd Semester Study Materials PDF Download Regulation 2017
EC8392 Syllabus - EC8392 Digital Electronics Syllabus (DE) is available in pdf format. In Mupabnews.com, Anna University 3rd Semester Engineering Students can also download EC8392 (Digi.Elec) Syllabus, Notes, Question Banks, Previous year Question Papers and Important Questions regulation 2017.
Anna University Syllabus Regulation 2017 - In Mupabnews.com, Students can also make use of Anna University Common syllabus Notes Question banks previous Year Question papers (Part A & 15marks Part B&C) for B.E/B.Tech/M.B.A/M.C.A students of all affiliated college in tamilnadu. Anna University R17 syllabus for all department like Aero, Automobile, EEE, ECE, EI, CSE, Civil, Mechanical for the academic year 2018-2019.
EC8392 Transforms and Partial Differential Equation Syllabus PDF - Click here
EC8392 Transforms and Partial Differential Equation Syllabus PDF - Click here
Anna University 3rd Semester EC8392 Digital Electronics Syllabus Regulation 2017
UNIT I DIGITAL FUNDAMENTALS
Number Systems – Decimal, Binary, Octal, Hexadecimal, 1„s and 2„s complements, Codes – Binary, BCD, Excess 3, Gray, Alphanumeric codes, Boolean theorems, Logic gates, Universal gates, Sum of products and product of sums, Minterms and Maxterms, Karnaugh map Minimization and Quine-McCluskey method of minimization.
UNIT II COMBINATIONAL CIRCUIT DESIGN
Design of Half and Full Adders, Half and Full Subtractors, Binary Parallel Adder – Carry look ahead Adder, BCD Adder, Multiplexer, Demultiplexer, Magnitude Comparator, Decoder, Encoder, Priority Encoder.
UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS
Flip flops – SR, JK, T, D, Master/Slave FF – operation and excitation tables, Triggering of FF, Analysis and design of clocked sequential circuits – Design - Moore/Mealy models, state minimization, state assignment, circuit implementation – Design of Counters- Ripple Counters, Ring Counters, Shift registers, Universal Shift Register.
UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS
Stable and Unstable states, output specifications, cycles and races, state reduction, race free assignments, Hazards, Essential Hazards, Pulse mode sequential circuits, Design of Hazard free circuits.
UNIT V MEMORY DEVICES AND DIGITAL INTEGRATED CIRCUITS
Basic memory structure – ROM -PROM – EPROM – EEPROM –EAPROM, RAM – Static and dynamic RAM - Programmable Logic Devices – Programmable Logic Array (PLA) - Programmable Array Logic (PAL) – Field Programmable Gate Arrays (FPGA) - Implementation of combinational logic circuits using PLA, PAL. Digital integrated circuits: Logic levels, propagation delay, power dissipation, fan-out and fan- in, noise margin, logic families and their characteristics-RTL, TTL, ECL, CMOS.
Number Systems – Decimal, Binary, Octal, Hexadecimal, 1„s and 2„s complements, Codes – Binary, BCD, Excess 3, Gray, Alphanumeric codes, Boolean theorems, Logic gates, Universal gates, Sum of products and product of sums, Minterms and Maxterms, Karnaugh map Minimization and Quine-McCluskey method of minimization.
UNIT II COMBINATIONAL CIRCUIT DESIGN
Design of Half and Full Adders, Half and Full Subtractors, Binary Parallel Adder – Carry look ahead Adder, BCD Adder, Multiplexer, Demultiplexer, Magnitude Comparator, Decoder, Encoder, Priority Encoder.
UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS
Flip flops – SR, JK, T, D, Master/Slave FF – operation and excitation tables, Triggering of FF, Analysis and design of clocked sequential circuits – Design - Moore/Mealy models, state minimization, state assignment, circuit implementation – Design of Counters- Ripple Counters, Ring Counters, Shift registers, Universal Shift Register.
UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS
Stable and Unstable states, output specifications, cycles and races, state reduction, race free assignments, Hazards, Essential Hazards, Pulse mode sequential circuits, Design of Hazard free circuits.
UNIT V MEMORY DEVICES AND DIGITAL INTEGRATED CIRCUITS
Basic memory structure – ROM -PROM – EPROM – EEPROM –EAPROM, RAM – Static and dynamic RAM - Programmable Logic Devices – Programmable Logic Array (PLA) - Programmable Array Logic (PAL) – Field Programmable Gate Arrays (FPGA) - Implementation of combinational logic circuits using PLA, PAL. Digital integrated circuits: Logic levels, propagation delay, power dissipation, fan-out and fan- in, noise margin, logic families and their characteristics-RTL, TTL, ECL, CMOS.
EC8392 Digital Electronics study materials
Download Digital Electronics Syllabus Notes Question Papers Question bank
EC8392 Study Materials | Download Link |
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EC8392 Syllabus | Click here to download Syllabus |
EC8392 Notes | Click here to download Unit wise Notes |
EC8392 Question Bank | Click here to download QB |
EC8392 Question Papers | Click here to download QP |
EC8392 2 marks (Part A) | Click here to download 2 marks with answers |
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Important Links:
Anna University Result Nov Dec 2018
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Important Links:
Anna University Result Nov Dec 2018
Anna University Revaluation Result 2018
TNPSC Group Result 2018
TN Board Results 2019
NEET Result 2018
Typewriting Shorthand Exam Result August 2018
Other Useful Information